product summary gh AON6242 60v n-channel mosfet v ds 60v i d (at v gs =10v) 85a r ds(on) (at v gs =10v) < 3.6m w r ds(on) (at v gs = 4.5v) < 4.5m w 100% uis tested 100% r g tested symbol v drain-source voltage 60 the AON6242 uses trench mosfet technology that is uniquely optimized to provide the most efficient hi frequency switching performance.power losses are minimized due to an extremely low combination of r ds(on) and crss.in addition,switching behavior is well controlled with a soft recovery body diode.this dev ice is ideal for boost converters and synchronous rectifie rs for consumer, telecom, industrial power supplies and le d backlighting. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted g d s top view 1 2 3 4 8 7 6 5 v ds v gs i dm i ar e ar t j , t stg symbol t 10s steady-state steady-state r q jc 240 pulsed drain current c continuous drain current g parameter typ max t c =25c 2.3 33 t c =100c maximum junction-to-ambient a c/w r q ja 14 40 17 v 20 gate-source voltage drain-source voltage 60 units junction and storage temperature range -55 to 150 c thermal characteristics v repetitive avalanche energy l=0.1mh c mj avalanche current c 14.5 continuous drain current 281 18.5 a 75 a t a =25c i dsm a t a =70c i d 85 66 t c =25c t c =100c power dissipation b p d w power dissipation a p dsm w t a =70c 83 1.4 t a =25c maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1 55 1.5 general description www.freescale.net.cn 1/6
AON6242 symbol min typ max units bv dss 60 v v ds =60v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.5 2 2.5 v i d(on) 240 a 3 3.6 t j =125c 4.8 5.8 3.6 4.5 m w g fs 140 s v sd 0.7 1 v i s 85 a c iss 4240 5305 6370 pf c oss 375 540 705 pf c rss 6.5 22 38 pf r g 0.45 0.9 1.35 w q g (10v) 48 60 72 nc q g (4.5v) 18 23 28 nc q gs 16 nc q gd 3 nc t d(on) 13 ns t 4 ns v gs =0v, v ds =0v, f=1mhz v gs =0v, v ds =30v, f=1mhz switching parameters v =10v, v =30v, r =1.5 w , gate resistance v gs =10v, v ds =30v, i d =20a gate source charge gate drain charge total gate charge electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss maximum body-diode continuous current g input capacitance output capacitance turn-on delaytime m a v ds =v gs, i d =250 m a i d =250 m a, v gs =0v zero gate voltage drain current v gs =10v, v ds =5v v gs =10v, i d =20a m w reverse transfer capacitance v ds =0v, v gs =20v gate-body leakage current forward transconductance diode forward voltage static drain-source on-resistance i s =1a,v gs =0v v ds =5v, i d =20a v gs =4.5v, i d =16a dynamic parameters drain-source breakdown voltage on state drain current r ds(on) total gate charge turn-on rise time t r 4 ns t d(off) 47 ns t f 6.5 ns t rr 17 24.5 32 ns q rr 87 125 163 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. i f =20a, di/dt=500a/ m s v gs =10v, v ds =30v, r l =1.5 w , r gen =3 w i f =20a, di/dt=500a/ m s body diode reverse recovery time body diode reverse recovery charge turn-off fall time turn-on rise time turn-off delaytime a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design, and the maximu m temperature of 150 c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in2 fr-4 board with 2oz. copper, in a still air environment with ta=25 c. www.freescale.net.cn 2/6
AON6242 typical electrical and thermal characteristics 17 5 2 10 0 18 0 10 20 30 40 50 60 70 80 90 100 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 2.0 2.5 3.0 3.5 4.0 4.5 0 5 10 15 20 25 30 r ds(on) (m w w w w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =16a v gs =10v i d =20a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 10 20 30 40 50 60 70 80 90 100 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 3.5v 10v 40 voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c temperature (note e) 2 3 4 5 6 7 2 4 6 8 10 r ds(on) (m w w w w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =20a 25 c 125 c 3/6 www.freescale.net.cn
AON6242 typical electrical and thermal characteristics 17 5 2 10 0 18 0 2 4 6 8 10 0 10 20 30 40 50 60 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 1000 2000 3000 4000 5000 6000 0 10 20 30 40 50 60 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 50 100 150 200 250 300 350 400 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction - to - c oss c rss v ds =30v i d =20a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) figure 9: maximum forward biased safe 10us 1ms dc r ds(on) t j(max) =150 c t c =25 c 100us 40 figure 10: single pulse power rating junction - to - case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 z q q q q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 9: maximum forward biased safe operating area (note f) r q jc =1.5 c/w 4/6 www.freescale.net.cn
AON6242 typical electrical and thermal characteristics 0 40 80 120 160 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a (us) figure 12: single pulse avalanche capability (note c) 0 20 40 60 80 100 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 20 40 60 80 100 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de - rating (note f) t a =25 c 1 10 100 1000 10000 0.0001 0.01 1 100 10000 power (w) pulse width (s) figure 15: single pulse power rating junction - to - t a =25 c t a =150 c t a =100 c t a =125 c 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q q q q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note g) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 14: current de - rating (note f) figure 15: single pulse power rating junction - to - ambient (note g) r q ja =55 c/w 5/6 www.freescale.net.cn
AON6242 - + v dc ig v ds d u t - + v d c v gs v gs 1 0v q g q gs q gd c ha rg e g ate c harge test c ircuit & w aveform - + v d c d u t vd d v gs v ds v gs r l r g v gs vds 1 0% 90% r esistive s w itching test c ircuit & w aveform s t t r d(on) t on t d(off) t f t off id l v ds b v u nclam ped inductive s w itching (u is ) test c ircuit & w aveform s vds d ss 2 e = 1/2 l i a r a r vdd v gs id vg s r g d u t - + v dc vg s v ds id v gs i ig v gs - + v dc d u t l v gs vd s isd isd d iode r ecovery t est c ircuit & w aveform s v ds - v ds + i f a r d i/dt i r m rr v dd vdd q = - id t t rr www.freescale.net.cn 6/6
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